/*****************************************************************************
 *   Copyright(C)2009-2022 by VSF Team                                       *
 *                                                                           *
 *  Licensed under the Apache License, Version 2.0 (the "License");          *
 *  you may not use this file except in compliance with the License.         *
 *  You may obtain a copy of the License at                                  *
 *                                                                           *
 *     http://www.apache.org/licenses/LICENSE-2.0                            *
 *                                                                           *
 *  Unless required by applicable law or agreed to in writing, software      *
 *  distributed under the License is distributed on an "AS IS" BASIS,        *
 *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
 *  See the License for the specific language governing permissions and      *
 *  limitations under the License.                                           *
 *                                                                           *
 ****************************************************************************/

#ifndef __HAL_DRIVER_HME_H7_UART_H__
#define __HAL_DRIVER_HME_H7_UART_H__

/*============================ INCLUDES ======================================*/

#include "hal/vsf_hal_cfg.h"

#if VSF_HAL_USE_USART == ENABLED

#include "../../__device.h"

#ifdef __cplusplus
extern "C" {
#endif

/*============================ MACROS ========================================*/

#define VSF_USART_CFG_REIMPLEMENT_TYPE_MODE         ENABLED
#define VSF_USART_CFG_REIMPLEMENT_TYPE_IRQ_MASK     ENABLED

/*============================ TYPES =========================================*/


typedef enum vsf_usart_mode_t {
    VSF_USART_NO_PARITY                     = (0x0 << 0x03),
    VSF_USART_ODD_PARITY                    = (0x1 << 0x03),
    VSF_USART_EVEN_PARITY                   = (0x3 << 0x03),
    VSF_USART_FORCE_0_PARITY                = (0x7 << 0x03),
    VSF_USART_FORCE_1_PARITY                = (0x6 << 0x03),

    VSF_USART_1_STOPBIT                     = (0x0 << 0x02),
    VSF_USART_2_STOPBIT                     = (0x1 << 0x02),           // 2 stop bits when data length is not 5 bits, else 1.5 stop bits, for simplicity, use as 2bits

    VSF_USART_5_BIT_LENGTH                  = (0x0 << 0x00),
    VSF_USART_6_BIT_LENGTH                  = (0x1 << 0x00),
    VSF_USART_7_BIT_LENGTH                  = (0x2 << 0x00),
    VSF_USART_8_BIT_LENGTH                  = (0x3 << 0x00),

    __DWC_USART_MCR_OFFSET                  = 8,
    VSF_USART_NO_HWCONTROL                  = (0) << __DWC_USART_MCR_OFFSET,
    VSF_USART_RTS_HWCONTROL                 = ((0x1 << 0x05) | (0x1 << 0x01)) << __DWC_USART_MCR_OFFSET,
    VSF_USART_CTS_HWCONTROL                 = ((0x1 << 0x05) | (0x0 << 0x01)) << __DWC_USART_MCR_OFFSET,
    VSF_USART_RTS_CTS_HWCONTROL             = ((0x1 << 0x05) | (0x1 << 0x01) | (0x0 << 0x01)) << __DWC_USART_MCR_OFFSET,


    // Not hardware, just keep for build
    VSF_USART_1_5_STOPBIT                   = (0x1ul << 16),
    VSF_USART_0_5_STOPBIT                   = (0x2ul << 16),

    VSF_USART_HALF_DUPLEX_ENABLE            = (0x0ul << 18),
    VSF_USART_HALF_DUPLEX_DISABLE           = (0x1ul << 18),
    
    VSF_USART_9_BIT_LENGTH                  = (0x1ul << 19),
    VSF_USART_10_BIT_LENGTH                 = (0x2ul << 19),
    
    VSF_USART_TX_ENABLE                     = (0x0ul << 20),
    VSF_USART_TX_DISABLE                    = (0x1ul << 20),
    
    VSF_USART_RX_ENABLE                     = (0x0ul << 21),
    VSF_USART_RX_DISABLE                    = (0x1ul << 21),
    
    VSF_USART_TX_FIFO_THRESH_ONE            = (0x0ul << 22),    //!< one data for txfifo
    VSF_USART_TX_FIFO_THRESH_HALF_FULL      = (0x1ul << 22),    //!< Half of the threshold for txfifo
    VSF_USART_TX_FIFO_THRESH_FULL           = (0x2ul << 22),    //!< Full of the threshold for txfifo

    VSF_USART_RX_FIFO_THRESH_ONE            = (0x0ul << 24),    //!< one data for txfifo
    VSF_USART_RX_FIFO_THRESH_HALF_FULL      = (0x1ul << 24),    //!< Half of the threshold for txfifo
    VSF_USART_RX_FIFO_THRESH_FULL           = (0x2ul << 24),    //!< Full of the threshold for txfifo
    
    DWC_USART_PARITY_MASK                   = VSF_USART_NO_PARITY |
                                              VSF_USART_EVEN_PARITY |
                                              VSF_USART_ODD_PARITY |
                                              VSF_USART_FORCE_0_PARITY |
                                              VSF_USART_FORCE_1_PARITY,
    DWC_USART_STOPBIT_MASK                  = VSF_USART_1_STOPBIT |
                                              VSF_USART_2_STOPBIT,
    DWC_USART_BIT_LENGTH_MASK               = VSF_USART_8_BIT_LENGTH |
                                              VSF_USART_7_BIT_LENGTH |
                                              VSF_USART_6_BIT_LENGTH |
                                              VSF_USART_5_BIT_LENGTH,
    DWC_USART_HWCONTROL_MASK                = VSF_USART_NO_HWCONTROL |
                                              VSF_USART_RTS_HWCONTROL |
                                              VSF_USART_CTS_HWCONTROL |
                                              VSF_USART_RTS_CTS_HWCONTROL,
    DWC_USART_FCR_MODE_ALL_BITS_MASK        = DWC_USART_PARITY_MASK |
                                              DWC_USART_STOPBIT_MASK |
                                              DWC_USART_BIT_LENGTH_MASK,
    DWC_USART_MCR_MODE_ALL_BITS_MASK        = DWC_USART_HWCONTROL_MASK,
    DWC_USART_MODE_ALL_BITS_MASK            = DWC_USART_PARITY_MASK |
                                              DWC_USART_STOPBIT_MASK |
                                              DWC_USART_BIT_LENGTH_MASK |
                                              DWC_USART_HWCONTROL_MASK,
} vsf_usart_mode_t;

typedef enum vsf_usart_irq_mask_t {
    // TX/RX reach fifo threshold, threshold on some devices is bound to 1
    VSF_USART_IRQ_MASK_TX                   = 0x00000002,
    VSF_USART_IRQ_MASK_RX                   = 0x00000001,

    DWC_USART_IRQ_LINE_STATUS_OFFSET        = 8,
    VSF_USART_IRQ_MASK_OVERFLOW_ERR         = (0x1ul << 9),
    VSF_USART_IRQ_MASK_PARITY_ERR           = (0x1ul << 10),
    VSF_USART_IRQ_MASK_FRAME_ERR            = (0x1ul << 11),
    VSF_USART_IRQ_MASK_BREAK_ERR            = (0x1ul << 12),

    // request_rx/request_tx complete
    VSF_USART_IRQ_MASK_TX_CPL               = (0x1ul << 29),
    VSF_USART_IRQ_MASK_RX_CPL               = (0x1ul << 30),
    VSF_USART_IRQ_MASK_RX_TIMEOUT           = (0x1ul << 31),

    DWC_USART_IRQ_ALL_BITS_MASK             = VSF_USART_IRQ_MASK_TX |
                                              VSF_USART_IRQ_MASK_RX,
    
    DWC_USART_IRQ_ALL_DMA_BITS_MASK         = VSF_USART_IRQ_MASK_TX_CPL | VSF_USART_IRQ_MASK_RX_CPL,
    DWC_USART_IRQ_ALL_UNSPOORT_BITS_MASK    = VSF_USART_IRQ_MASK_RX_TIMEOUT,
} vsf_usart_irq_mask_t;


/*============================ GLOBAL VARIABLES ==============================*/
/*============================ PROTOTYPES ====================================*/

#ifdef __cplusplus
}
#endif

#endif      // VSF_HAL_USE_USART
#endif      // __HAL_DRIVER_HME_H7_UART_H__
/* EOF */
